1. Field of the Invention
The present invention relates to a packaging conductive structure for a semiconductor substrate. In particular, the invention relates to a packaging conductive structure capable of enhancing the conductivity and junction buffer.
2. Descriptions of the Related Art
Electronic products have been equipped with semiconductor chips to provide control or logic operation functions. Recent advancement of process technologies has miniaturized semiconductor chips, thereby, gradually reducing the packaging size.
Due to the miniaturization, the conventional wire bonding techniques for connecting semiconductor chips to other devices are no longer applicable. The flip chip bonding technique has replaced the wire bonding technique for connecting the semiconductor chips to other devices using bumps. More specifically, a plurality of bumps electrically connected to the structure inside the chip is disposed on the surface of the semiconductor chip for bonding purposes. In addition, the flip chip bonding technique does not require a large area, as previously required in the conventional wire technique, making it suitable for advanced process.
FIG. 1 is a schematic cross-sectional view showing a conventional semiconductor packaging conductive structure with a pad. The semiconductor chip 10 comprises a substrate 11 and a pad 13 disposed thereon. The pad 13 is usually made of a conductive metallic material and serves as a contact point for electrically connecting to the semiconductor structure within the semiconductor chip 10 and external devices. A passivation layer 15 is disposed on the substrate 11 and overlays the periphery of the pad 13 to expose a portion of the pad 13. Next, an under bump metal (UBM) 17 is formed on the pad 13, and finally a bump 19 is fixed on the UBM 17. Accordingly, the bump 19 may be electrically connected to the pad 13 through the UBM 17.
However, in the conventional packaging conductive structure, the capability of the junction buffer of the bump 19 on the UBM 17 is limited in structure and material. In addition, the conductive area of the pad 13 is decided before packaging. Once the process proceeds with poor control or improper selections of the materials, a breakage may occur due to the poor junction in the bump 19. As a result, the bump 19 may peel off and cause the semiconductor chip to fail.
Accordingly, providing a packaging conductive structure with better junction buffer capabilities and conductivity is highly desired in the semiconductor industry.